In recent electronic devices, arrangements to realize compact forms and higher functions of them have been made. In order to make the electronic devices compact and obtain the higher functions of them, it has been demanded to mount semiconductor devices of large capacity with small mounting areas and small mounting volume as much as possible.
For instance, in the electronic device using a semiconductor memory, an attempt has been made to make the device more compact with the increase of an amount of treated information. As the amount of information handled by the electronic device increases, it has been also demanded not only to increase the capacity of the semiconductor memory used for storing the information, but also to make the semiconductor memory mounted in the electronic device compact so as to meet the compact electronic device. In other words, the mounting area and the mounting volume of the semiconductor memory to be mounted in the electronic device have been desired to be decreased.
Thus, there has been proposed various kinds of semiconductor devices in which a plurality of semiconductor memories are combined to increase the storage capacity. FIGS. 1 to 3 show one example of such semiconductor devices.
In the semiconductor device shown in FIGS. 1 to 3, a semiconductor chip 101 forming a semiconductor memory is firstly prepared. The back surface of the semiconductor chip 101, that is, a surface 102 opposite to a surface on which a connecting terminal to a substrate is formed is ground to form a mounting semiconductor chip 103 whose thickness is reduced. The semiconductor chip 103 which is ground is reversed, that is, the semiconductor chip 103 is mounted on a substrate 104 with the ground surface used as a mounting surface, as shown in FIG. 1. On both the front and back surfaces of the substrate 104, are formed inter-substrate connecting electrodes 105 and 106 electrically connected to a wiring pattern to which the semiconductor chip 103 mounted on the substrate 104 is electrically connected. These inter-substrate connecting electrodes 105 and 106 are electrically connected to each other through through holes 107 opened on the substrate 104. On the inter-substrate connecting electrodes 105 formed on the surface on which the semiconductor chip 103 is mounted, solder bumps 108 with prescribed height are formed to form a semiconductor device 109 as shown in FIG. 2.
A plurality of the semiconductor devices 109 formed as shown in FIG. 2 are stacked so as to be layered and the solder bumps 108 are respectively connected to the inter-substrate connecting electrodes 106 so that a layered semiconductor device 110 as shown in FIG. 3 is formed.
As described above, the semiconductor chip 101 is ground to decrease the thickness so that the thickness of the layered semiconductor device 110 obtained by layering these semiconductor chips 101 in multiple stages can be reduced. The thickness of the layered semiconductor device 110 formed by layering a plurality of the above-described semiconductor devices 109 can be adequately reduced.
In the semiconductor device 109 used for the above-described layered semiconductor device 110, since the semiconductor chip 101 as a simple substance is ground to obtain the mounting semiconductor chip 103 whose thickness is reduced, a load exerted on the semiconductor chip 101 is large. Thus, there arises a great risk that cracks or the like may be possibly formed on the semiconductor chip 101 and the semiconductor chip 101 may be broken. Therefore, there is a limit to reduce the thickness of the semiconductor chip 101 and the thickness of the semiconductor chip is hardly reduced to a desire thickness.
In order to lighten the load exerted on the semiconductor chip 101 upon grinding, there may be considered a method that after the semiconductor chip 101 is mounted on the substrate, all the peripheral surface of the semiconductor chip 101 is completely covered with a synthetic resin for encapsulating, and then, the semiconductor chip 101 is ground together with the encapsulating resin. In such a manner, since the load exerted on the semiconductor chip upon grinding is distributed to the encapsulating resin, even when the semiconductor chip 101 is ground until its thickness is adequately decreases, the damage of the semiconductor chip 101 such as cracks can be avoided.
When all the surface of the outer periphery of the semiconductor chip 101 mounted on the substrate is covered with the encapsulating resin, the inter-substrate connecting electrodes 105 and 106 are also covered with the encapsulating resin. Accordingly, in order to layer the plural semiconductor chips 101, it is necessary to remove the encapsulating resin with which the inter-substrate connecting electrodes are covered by using a laser beam or the like, or form in the encapsulating resin holes reaching the inter-substrate connecting electrodes and fill the holes with soft solder. The holes have bottoms, and it is very difficult to fill the holes having the bottoms with the soft solder so as not to supply air bubbles to the holes. For instance, it is extremely difficult to supply the soft solder by a simple screen printing method.